evaluation board user guide UG-018 one technology way ? p. o. box 9106 ? norwood, ma 02062-9106, u.s.a. ? tel: 781.329.4700 ? fax: 781.461.3113 ? www.analog.com evaluation board for dual high speed differential amplifiers see the last page for an impo rtant warning and disclaimers. rev. a | page 1 of 1 features enables quick breadboarding/prototyping user-defined circuit configuration edge-mounted sma connector provisions easy connection to test equipment and other circuits two independent circuits enhance flexibility general description the eb-d24cp44-2z is designed, to aid in the evaluation of dual high speed differential amplifiers. the eb-d24cp44-2z is a bare board (that is, there are no components soldered to the board) that enables users to quickly prototype a variety of differential amplifier circuits, which minimizes risk and reduces time to market. the eb-d24cp44-2z evaluation board supports any of analog devices, inc., dual high speed differential amplifiers in 4 mm 4 mm lead frame chip scale packages (lfcsp). figure 1 shows the component side and circuit side of the evaluation board. figure 2 shows the evaluation board schematic. the 4-layer evaluation board accepts edge-mounted sma con- nectors on both inputs and outputs, which allows efficient and quick connection to test equipment or other circuitry. the board ground plane, component placement, and power supply bypassing have been optimized for maximum circuit flexibility and performance. the evaluation board uses a variety of smt component case sizes: 0402, 0508, 0805, and 7343. figure 3 and figure 5 show the evaluation board assembly drawings. the metal layout pattern for connecting the board to the op amp and to the supporting circuitry is shown in figure 4 and figure 6 . digital picture of the evaluation board 08142-006 component side notes 1. the evaluation board silkscreen part number labeling on your board may be different from what is shown here. circuit side figure 1. component and circuit side of pcb
UG-018 evaluation board user guide rev. a | page 2 of 2 table of contents features .............................................................................................. 1 ? general description ......................................................................... 1 ? digital picture of the evaluation board ......................................... 1 ? revision history ............................................................................... 2 ? evaluation board schematic ............................................................3 ? assembly drawing and board layout ............................................4 ? esd caution...................................................................................4 ? revision history 2/10rev. 0 to rev. a changes to general description and figure 1 ............................. 1 7/09revision 0: initial version
evaluation board user guide UG-018 rev. a | page 3 of 3 evaluation board schematic 0 ? a g n d d n i a g n d a g n d 2 0 0 a g n d a g n d a g n d a g n d a g n d d n i a g n d d n i d n i a g n d a g n d a g n d * u s e r - d e f i n e d v a l u e d n i = d o n o t i n s t a l l 1 0 f a g n d d n i 1 0 f a g n d a g n d 0 . 1 f 0 . 1 f 0 . 1 f 0 . 1 f 0 . 1 f a g n d a g n d a g n d d n i a g n d 0 ? 0 ? 0 ? s m a s m a s m a s m a s m a s m a s m a s m a s m a s m a s m a s m a a g n d 0 . 1 f ? i n 1 + v s 1 + v s 1 + i n 2 ? i n 2 ? f b 2 + v s 2 + v s 2 v o c m 2 ? o u t 2 p d 2 ? v s 2 ? v s 2 v o c m 1 + o u t 1 p d 1 / d i s 1 ? v s 1 ? v s 1 ? f b 1 + i n 1 + o u t 2 ? o u t 1 + f b 1 + f b 2 1 0 f 1 0 f + + 1 p 1 r 1 5 * ? v s 2 3 p 1 ? v s 1 r 1 4 * + v s 1 r 1 3 * c 1 4 c 4 + + 7 8 9 1 0 1 1 1 2 1 3 1 4 1 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 2 3 2 4 3 4 5 6 z 1 c 2 + o u t 2 + o u t 2 ? o u t 2 ? o u t 2 v o c m 1 + o t 1 + o u t 1 ? o u t 1 ? o u t 1 p d 1 / d i s 1 ? i n 2 ? i n 2 + i n 2 + i n 2 ? i n 1 ? i n 1 + i n 1 + i n 1 v o c m 2 a g n d + v s 1 r 1 0 * r 2 6 r 2 5 r 2 7 r 2 9 r 1 8 * g n d 1 + v s 1 ( t p 2 ) c 9 c 6 c 1 3 c 1 2 c 1 0 + v s 2 r 1 6 * r 1 * r 4 * r 2 * r 3 * 1 p 3 ? v s 1 ( t p 5 ) + v s 2 ( t p 3 ) c 7 t p 1 r 2 2 ? v s 2 ( t p 4 ) c 1 v o c m 2 ( t p 6 ) r 2 3 r 2 4 r 2 1 p d 2 2 p 3 3 p 3 r 1 9 * r 1 7 * r 9 * r 5 * r 1 1 * r 6 * r 7 * r 8 * r 1 2 * 3 p 2 2 p 2 p d 1 1 p 2 + v s 2 + v s 1 g n d 2 g n d 3 g n d 4 r 3 0 ? v s 2 ? v s 1 r 2 8 v o c m 1 2 p 1 ? v s 1 r 2 0 * 0 8 1 4 2 - 0 0 1 p d 2 / d i s 2 figure 2. dual differential amplifier universal evaluation board schematic
UG-018 evaluation board user guide rev. a | page 4 of 4 assembly drawing and board layout 0 8142-002 figure 3. board assembly drawing, component side 08142-004 figure 4. board layout pattern, component side 08142-003 figure 5. board assembly drawing, circuit side 0 8142-005 figure 6. board layout pattern, circuit side esd caution evaluation boards are only intend ed for device evaluation and not for production purposes. evaluation boards are supplied as i s and without warranties of any kind, express, implied, or statutory including, but not limited to, any implied warranty of merchantability or fitness for a particular purpos e. no license is granted by implication or otherwise under any patents or other intellectual property by application or use of evaluation boards. information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog device s for its use, nor for any infringements of patents or other rights of third parties that may result from its use. analog devices reserves the right to change devices or specifications at any time without no tice. trademarks and registered trademarks are the property of their respective owners. evaluation boards are not authorized to be used in life support devices or systems. ?2010 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. ug08142-0-2/10( a)
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